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EN0-001 Exam Dumps : ARM Accredited Engineer

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ARM Accredited Engineer Questions and Answers

Question 1

An undefined instruction will cause an Undefined Instruction exception to be taken when:

Options:

A.

It is fetched.

B.

It is decoded.

C.

It is executed.

D.

It writes back its results.

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Question 2

Consider a sequence of five independent instructions running on a pipelined processor. There are no interlocks and no data dependencies between instructions, and each instruction takes one cycle to execute. The processor has three pipeline stages and is not superscalar.

How many cycles does it take to fetch, decode and execute all five instructions in sequence, assuming that there are no pipeline stalls?

Options:

A.

5 cycles

B.

7 cycles

C.

8 cycles

D.

15 cycles

Question 3

Which one of these statements is TRUE about code running on final hardware without a debugger attached?

Options:

A.

FIQ exceptions must not be taken

B.

The instruction cache must be enabled

C.

Global variables must be initialized to zero

D.

The Reset Vector must reside in non-volatile memory